STM32+SSD1963+TFT(FSMC)已調(diào)試通過(guò)的代碼。

其中要注意的兩點(diǎn)：

1.外部訪問(wèn)地址需加volatile，否則keil MDK 優(yōu)化會(huì)將部分代碼優(yōu)化掉，造成錯(cuò)誤。

　volatile關(guān)鍵字是一種類型修飾符，用它聲明的類型變量表示可以被某些編譯器未知的因素更改，比如：操作系統(tǒng)、硬件或者其它線程等。遇到這個(gè)關(guān)鍵字聲明的變量，編譯器對(duì)訪問(wèn)該變量的代碼就不再進(jìn)行優(yōu)化，從而可以提供對(duì)特殊地址的穩(wěn)定訪問(wèn)。 
2. FSMC內(nèi)部地址和外部實(shí)際地址有區(qū)別。如A18連線對(duì)應(yīng)內(nèi)部地址是A19。

// ssd1963 #d/c   -------- STM32F103VCT6 A18

#define LCD_COMM_ADD  *((volatile u16 *)0X60000000)
 #define LCD_DATA_ADD  *((volatile u16 *)0X60080000)

 #define WriteCommand(cmd) {LCD_COMM_ADD = cmd;}
 #define WriteData(data)  {LCD_DATA_ADD = data;}

void LCDFSMCConfig(void)
{
  FSMC_NORSRAMInitTypeDef  FSMC_NORSRAMInitStructure;
  FSMC_NORSRAMTimingInitTypeDef  p;
  GPIO_InitTypeDef GPIO_InitStructure;
/*-- FSMC Configuration ------------------------------------------------------*/

/* Enable FSMC, GPIOD, GPIOE, GPIOF, GPIOG and AFIO clocks */
  RCC_AHBPeriphClockCmd(RCC_AHBPeriph_FSMC, ENABLE);
  RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOD | RCC_APB2Periph_GPIOE |
             RCC_APB2Periph_AFIO, ENABLE);

/*===========GPIO For the LCD_Bus========================*/ 
  /*  Data /Address lines configuration */
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 |
          GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  GPIO_Init(GPIOD, &GPIO_InitStructure);

  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10 | GPIO_Pin_11 |
          GPIO_Pin_12 | GPIO_Pin_13 | GPIO_Pin_14 | GPIO_Pin_15;
  GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  GPIO_Init(GPIOE, &GPIO_InitStructure);

  /*  Address lines configuration: A18*/
  GPIO_InitStructure.GPIO_Pin = GPIO_Pin_13;
  GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP; 
  GPIO_Init(GPIOD, &GPIO_InitStructure); 

  /*===========GPIO For the Control========================*/
 /*!< NOE and NWE configuration */ 
 GPIO_InitStructure.GPIO_Pin = GPIO_Pin_4 |GPIO_Pin_5;
 
 GPIO_Init(GPIOD, &GPIO_InitStructure);
 
 /*!< NE1 configuration */
    GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
    GPIO_Init(GPIOD, &GPIO_InitStructure);
 
 /*!< NADV configuration */
// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_7;
// GPIO_Init(GPIOB, &GPIO_InitStructure);
 #ifdef LCD_USE_TE
 /*TE :busy*/
   GPIO_InitStructure.GPIO_Pin = GPIO_PIN_LCD_TE;
   GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IPU; 
   GPIO_Init(GPIO_PORT_LCD_TE, &GPIO_InitStructure);
    #endif
 /*!< NBL0, NBL1 configuration */
// GPIO_InitStructure.GPIO_Pin = GPIO_Pin_0 | GPIO_Pin_1;
// GPIO_Init(GPIOE, &GPIO_InitStructure);
  GPIO_SetBits(GPIOD, GPIO_Pin_7);   //CS=1
  GPIO_SetBits(GPIOD, GPIO_Pin_14| GPIO_Pin_15 |GPIO_Pin_0 | GPIO_Pin_1);   
  GPIO_SetBits(GPIOE, GPIO_Pin_7 | GPIO_Pin_8 | GPIO_Pin_9 | GPIO_Pin_10);  
  GPIO_ResetBits(GPIOE, GPIO_Pin_0);
  GPIO_ResetBits(GPIOE, GPIO_Pin_1);   //RESET=0
  GPIO_SetBits(GPIOD, GPIO_Pin_4);      //RD=1
  GPIO_SetBits(GPIOD, GPIO_Pin_5);   //WR=1    
 /*-- FSMC Configuration ------------------------------------------------------*/
 
/*----------------------- SRAM Bank 1----------------------------------------*/
  /* FSMC_Bank1_NORSRAM1 configuration */
  p.FSMC_AddressSetupTime = 0x02;//1;
  p.FSMC_AddressHoldTime = 0x00;//0;
  p.FSMC_DataSetupTime = 0x05;//5//2;
  p.FSMC_BusTurnAroundDuration = 0;
  p.FSMC_CLKDivision = 0;
  p.FSMC_DataLatency = 0;
  p.FSMC_AccessMode = FSMC_AccessMode_B;//FSMC_AccessMode_A;
  /* Color LCD configuration ------------------------------------
     LCD configured as follow:
        - Data/Address MUX = Enable
        - Memory Type = SRAM
        - Data Width = 16bit
        - Write Operation = Enable
        - Extended Mode = Enable
        - Asynchronous Wait = Disable */
  FSMC_NORSRAMInitStructure.FSMC_Bank = FSMC_Bank1_NORSRAM1;
  FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Disable;  //hy@
 // FSMC_NORSRAMInitStructure.FSMC_DataAddressMux = FSMC_DataAddressMux_Enable;  //hy@ 
 // FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_SRAM;//FSMC_MemoryType_NOR;//FSMC_MemoryType_SRAM;//
  FSMC_NORSRAMInitStructure.FSMC_MemoryType = FSMC_MemoryType_NOR;//FSMC_MemoryType_SRAM;//

  FSMC_NORSRAMInitStructure.FSMC_MemoryDataWidth = FSMC_MemoryDataWidth_16b;
  FSMC_NORSRAMInitStructure.FSMC_BurstAccessMode = FSMC_BurstAccessMode_Disable;
//  FSMC_NORSRAMInitStructure.FSMC_AsynchronousWait = FSMC_AsynchronousWait_Disable; 
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalPolarity = FSMC_WaitSignalPolarity_Low;
  FSMC_NORSRAMInitStructure.FSMC_WrapMode = FSMC_WrapMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignalActive = FSMC_WaitSignalActive_BeforeWaitState;
  FSMC_NORSRAMInitStructure.FSMC_WriteOperation = FSMC_WriteOperation_Enable;
  FSMC_NORSRAMInitStructure.FSMC_WaitSignal = FSMC_WaitSignal_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ExtendedMode = FSMC_ExtendedMode_Disable;
  FSMC_NORSRAMInitStructure.FSMC_WriteBurst = FSMC_WriteBurst_Disable;
  FSMC_NORSRAMInitStructure.FSMC_ReadWriteTimingStruct = &p;
  FSMC_NORSRAMInitStructure.FSMC_WriteTimingStruct = &p;
  FSMC_NORSRAMInit(&FSMC_NORSRAMInitStructure); 
  /* BANK 1 (of NOR/SRAM Bank 1~4) is enabled */
  FSMC_NORSRAMCmd(FSMC_Bank1_NORSRAM1, ENABLE);
}

/**
  * @brief  Initializes the LCD.
  * @param  None
  * @retval None
  */
void IzLCDDisplayInit(void)
{

/* Configure the FSMC Parallel interface -------------------------------------*/
  LCDFSMCConfig();
 
  DelayLoop(5); /* delay 50 ms */
  //LCD_SetFont(&LCDDEFAULTFONT);
  LCDSetFont(&LCDDEFAULTFONT);
  InitSSD1963();

}