GPIO

Taylor 2008-07-28

展開全文

一、什么是GPIO？

GPIO，英文全稱為General-Purpose IO ports，也就是通用IO口。嵌入式系統(tǒng)中常常有數(shù)量眾多，但是結(jié)構(gòu)卻比較簡單的外部設備/電路，對這些設備/電路有的需要CPU為之提供控制手段，有的則需要被CPU用作輸入信號。而且，許多這樣的設備/電路只要求一位，即只要有開/關(guān)兩種狀態(tài)就夠了，比如燈亮與滅。對這些設備/電路的控制，使用傳統(tǒng)的串行口或并行口都不合適。所以在微控制器芯片上一般都會提供一個“通用可編程IO接口”，即GPIO。

接口至少有兩個寄存器，即“通用IO控制寄存器”與“通用IO數(shù)據(jù)寄存器”。數(shù)據(jù)寄存器的各位都直接引到芯片外部，而對這種寄存器中每一位的作用，即每一位的信號流通方向，則可以通過控制寄存器中對應位獨立的加以設置。這樣，有無GPIO接口也就成為微控制器區(qū)別于微處理器的一個特征。

在實際的MCU中，GPIO是有多種形式的。比如，有的數(shù)據(jù)寄存器可以按照位尋址，有些卻不能按照位尋址，這在編程時就要區(qū)分了。比如傳統(tǒng)的8051系列，就區(qū)分成可位尋址和不可位尋址兩種寄存器。另外，為了使用的方便，很多mcu把glue logic等集成到芯片內(nèi)部，增強了系統(tǒng)的穩(wěn)定性能，比如GPIO接口除去兩個標準寄存器必須具備外，還提供上拉寄存器，可以設置IO的輸出模式是高阻，還是帶上拉的電平輸出，或者不帶上拉的電平輸出。這在電路設計中，外圍電路就可以簡化不少。

另外需要注意的是，對于不同的計算機體系結(jié)構(gòu)，設備可能是端口映射，也可能是內(nèi)存映射的。如果系統(tǒng)結(jié)構(gòu)支持獨立的IO地址空間，并且是端口映射，就必須使用匯編語言完成實際對設備的控制，因為C語言并沒有提供真正的“端口”的概念。如果是內(nèi)存映射，那就方便的多了。

舉個例子，比如像寄存器A（地址假定為0x48000000）寫入數(shù)據(jù)0x01，那么就可以這樣設置了。

#define A (*(volatile unsigned long *)0x48000000)
...
A = 0x01;
...

這實際上就是內(nèi)存映射機制的方便性了。其中volatile關(guān)鍵字是嵌入式系統(tǒng)開發(fā)的一個重要特點。上述表達式拆開來分析，首先(volatile unsigned long *)0x48000000的意思是把0x48000000強制轉(zhuǎn)換成volatile unsigned long類型的指針，暫記為p，那么就是#define A *p，即A為P指針指向位置的內(nèi)容了。這里就是通過內(nèi)存尋址訪問到寄存器A，可以讀/寫操作。

二、S3C2410的GPIO的特點

s3c2410的GPIO有117pin，下面應該到9 IO ports看看詳細部分了。

The S3C2410X has 117 multi-functional input/output port pins. The ports are:
— Port A (GPA): 23-output port
— Port B (GPB): 11-input/output port
— Port C (GPC): 16-input/output port
— Port D (GPD): 16-input/output port
— Port E (GPE): 16-input/output port
— Port F (GPF): 8-input/output port
— Port G (GPG): 16-input/output port
— Port H (GPH): 11-input/output port

這么多的IO口，其實很多是復合功能的，既可以作為普通的IO口使用，也可以作為特殊外設接口。在程序設計時，要對整體的資源有所規(guī)劃，初始化時就應該把所有資源安排合理。這樣才會避免出現(xiàn)問題。

現(xiàn)在的8個端口，其寄存器是相似的。除了兩個通用寄存器GPxCON、GPxDAT外，還提供了GPxUP用于確定是否使用內(nèi)部上拉電阻（其中x為A-H，需要注意的是沒有GPAUP）。應用的主要步驟就是：

·設置GPIO控制寄存器GPxCON

·設置GPIO上拉寄存器GPxUP

初始化完成后，就可以通過對GPxDAT的操作來實現(xiàn)相應的應用了。其中，PORT A與PORT B-H在功能選擇方面有所不同，GPACON的每一位對應一根引腳（共23pin有效）。當某位設為0，相應引腳為輸出引腳，此時往GPADAT中寫0/1，可以讓引腳輸出低電平/高電平；當某位設為1，則相應引腳為地址線，或者用于地址控制，此時GPADAT沒有用了。

一般而言，GPACON通常全設為1，以便訪問外部存儲器件。PORT B-H在寄存器操作方面完全相同。

GPxCON中每兩位控制一根引腳：00表示輸入，01表示輸出，10表示特殊功能，11保留。GPxDAT用于讀/寫引腳：當引腳設為輸入時，讀此寄存器可知相應引腳狀態(tài)是高/低；當引腳設為輸出時，寫此寄存器相應位可以使相應引腳輸出低電平或高電平。GPxUP：某位設為0，相應引腳無內(nèi)部上拉；為1，相應引腳使用內(nèi)部上拉。關(guān)于特殊功能，那就得結(jié)合特殊外設來進行設置了。

三基本實驗

實驗1：8段數(shù)碼管顯示，共四位

我的開發(fā)板上沒有多余的GPIO插頭，只好利用液晶的顯示的插口了，對應的引腳：

VD[0：7] 對應 GPC[8：15] VD[8：23] 對應 GPD[0：15]

四個共陰極的數(shù)碼管，選擇信號對應GPC[8：11]

8段顯示數(shù)據(jù)對應GPD[0：7]

這樣一來就可以利用這四個數(shù)碼管顯示數(shù)字了

（1）軟件架構(gòu)仿照了vivi，或者Linux Kernel。其實寫這么小的程序用不到這么麻煩，但是可以訓練這種架構(gòu)，為寫中型大型程序打好基礎(chǔ)。

（2）注意C語言下實現(xiàn)寄存器讀寫的(*(volatile unsigned long *)(addr))。其實就是要掌握volatile和指針的用法。

（3）寫c時，要注意頭文件如何處理。寫Makefile時，要注意是否采用隱含規(guī)則，如果不采用，就要自己定義明確規(guī)則，就像vivi里面的Rules.make。在這里，因為只是涉及到.s的編譯不采用隱含規(guī)則，所以沒有把Rules.make單獨拿出，事實上可以單獨寫為Rules.make，然后在Makefile后加入include Rules.make就可以了。

（4）要調(diào)用C子程序，必須分配堆?？臻g。因為子程序調(diào)用時，要進行入棧出棧處理。又因為從nand flash啟動，而nand flash在S3C2410下的特點規(guī)定堆棧不能超過4K。

文件打包

文件:	led_c.tar.gz
大小:	10KB
下載:	下載

Using the I2C Bus

Judging from my emails, it is quite clear that the I2C bus can be very confusing for the newcomer. I have lots of examples on using the I2C bus on the website, but many of these are using high level controllers and do not show the detail of what is actually happening on the bus. This short article therefore tries to de-mystify the I2C bus, I hope it doesn‘t have the opposite effect!

The physical I2C bus
This is just two wires, called SCL and SDA. SCL is the clock line. It is used to synchronize all data transfers over the I2C bus. SDA is the data line. The SCL & SDA lines are connected to all devices on the I2C bus. There needs to be a third wire which is just the ground or 0 volts. There may also be a 5volt wire is power is being distributed to the devices. Both SCL and SDA lines are "open drain" drivers. What this means is that the chip can drive its output low, but it cannot drive it high. For the line to be able to go high you must provide pull-up resistors to the 5v supply. There should be a resistor from the SCL line to the 5v line and another from the SDA line to the 5v line. You only need one set of pull-up resistors for the whole I2C bus, not for each device, as illustrated below:

The value of the resistors is not critical. I have seen anything from 1k8 (1800 ohms) to 47k (47000 ohms) used. 1k8, 4k7 and 10k are common values, but anything in this range should work OK. I recommend 1k8 as this gives you the best performance. If the resistors are missing, the SCL and SDA lines will always be low - nearly 0 volts - and the I2C bus will not work.

Masters and Slaves
The devices on the I2C bus are either masters or slaves. The master is always the device that drives the SCL clock line. The slaves are the devices that respond to the master. A slave cannot initiate a transfer over the I2C bus, only a master can do that. There can be, and usually are, multiple slaves on the I2C bus, however there is normally only one master. It is possible to have multiple masters, but it is unusual and not covered here. On your robot, the master will be your controller and the slaves will be our modules such as the SRF08 or CMPS03. Slaves will never initiate a transfer. Both master and slave can transfer data over the I2C bus, but that transfer is always controlled by the master.

The I2C Physical Protocol
When the master (your controller) wishes to talk to a slave (our CMPS03 for example) it begins by issuing a start sequence on the I2C bus. A start sequence is one of two special sequences defined for the I2C bus, the other being the stop sequence. The start sequence and stop sequence are special in that these are the only places where the SDA (data line) is allowed to change while the SCL (clock line) is high. When data is being transferred, SDA must remain stable and not change whilst SCL is high. The start and stop sequences mark the beginning and end of a transaction with the slave device.

Data is transferred in sequences of 8 bits. The bits are placed on the SDA line starting with the MSB (Most Significant Bit). The SCL line is then pulsed high, then low. Remember that the chip cannot really drive the line high, it simply "lets go" of it and the resistor actually pulls it high. For every 8 bits transferred, the device receiving the data sends back an acknowledge bit, so there are actually 9 SCL clock pulses to transfer each 8 bit byte of data. If the receiving device sends back a low ACK bit, then it has received the data and is ready to accept another byte. If it sends back a high then it is indicating it cannot accept any further data and the master should terminate the transfer by sending a stop sequence.

How fast?
The standard clock (SCL) speed for I2C up to 100KHz. Philips do define faster speeds: Fast mode, which is up to 400KHz and High Speed mode which is up to 3.4MHz. All of our modules are designed to work at up to 100KHz. We have tested our modules up to 1MHz but this needs a small delay of a few uS between each byte transferred. In practical robots, we have never had any need to use high SCL speeds. Keep SCL at or below 100KHz and then forget about it.

I2C Device Addressing
All I2C addresses are either 7 bits or 10 bits. The use of 10 bit addresses is rare and is not covered here. All of our modules and the common chips you will use will have 7 bit addresses. This means that you can have up to 128 devices on the I2C bus, since a 7bit number can be from 0 to 127. When sending out the 7 bit address, we still always send 8 bits. The extra bit is used to inform the slave if the master is writing to it or reading from it. If the bit is zero are master is writing to the slave. If the bit is 1 the master is reading from the slave. The 7 bit address is placed in the upper 7 bits of the byte and the Read/Write (R/W) bit is in the LSB (Least Significant Bit).

The placement of the 7 bit address in the upper 7 bits of the byte is a source of confusion for the newcomer. It means that to write to address 21, you must actually send out 42 which is 21 moved over by 1 bit. It is probably easier to think of the I2C bus addresses as 8 bit addresses, with even addresses as write only, and the odd addresses as the read address for the same device. To take our CMPS03 for example, this is at address 0xC0 ($C0). You would uses 0xC0 to write to the CMPS03 and 0xC1 to read from it. So the read/write bit just makes it an odd/even address.

The I2C Software Protocol
The first thing that will happen is that the master will send out a start sequence. This will alert all the slave devices on the bus that a transaction is starting and they should listen in incase it is for them. Next the master will send out the device address. The slave that matches this address will continue with the transaction, any others will ignore the rest of this transaction and wait for the next. Having addressed the slave device the master must now send out the internal location or register number inside the slave that it wishes to write to or read from. This number is obviously dependant on what the slave actually is and how many internal registers it has. Some very simple devices do not have any, but most do, including all of our modules. Our CMPS03 has 16 locations numbered 0-15. The SRF08 has 36. Having sent the I2C address and the internal register address the master can now send the data byte (or bytes, it doesn‘t have to be just one). The master can continue to send data bytes to the slave and these will normally be placed in the following registers because the slave will automatically increment the internal register address after each byte. When the master has finished writing all data to the slave, it sends a stop sequence which completes the transaction. So to write to a slave device:
1. Send a start sequence
2. Send the I2C address of the slave with the R/W bit low (even address)
3. Send the internal register number you want to write to
4. Send the data byte
5. [Optionally, send any further data bytes]
6. Send the stop sequence.

As an example, you have an SRF08 at the factory default address of 0xE0. To start the SRF08 ranging you would write 0x51 to the command register at 0x00 like this:
1. Send a start sequence
2. Send 0xE0 ( I2C address of the SRF08 with the R/W bit low (even address)
3. Send 0x00 (Internal address of the command register)
4. Send 0x51 (The command to start the SRF08 ranging)
5. Send the stop sequence.

Reading from the Slave
This is a little more complicated - but not too much more. Before reading data from the slave device, you must tell it which of its internal addresses you want to read. So a read of the slave actually starts off by writing to it. This is the same as when you want to write to it: You send the start sequence, the I2C address of the slave with the R/W bit low (even address) and the internal register number you want to write to. Now you send another start sequence (sometimes called a restart) and the I2C address again - this time with the read bit set. You then read as many data bytes as you wish and terminate the transaction with a stop sequence. So to read the compass bearing as a byte from the CMPS03 module:
1. Send a start sequence
2. Send 0xC0 ( I2C address of the CMPS03 with the R/W bit low (even address)
3. Send 0x01 (Internal address of the bearing register)
4. Send a start sequence again (repeated start)
5. Send 0xC1 ( I2C address of the CMPS03 with the R/W bit high (odd address)
6. Read data byte from CMPS03
7. Send the stop sequence.

The bit sequence will look like this:

Wait a moment
That‘s almost it for simple I2C communications, but there is one more complication. When the master is reading from the slave, its the slave that places the data on the SDA line, but its the master that controls the clock. What if the slave is not ready to send the data! With devices such as EEPROMs this is not a problem, but when the slave device is actually a microprocessor with other things to do, it can be a problem. The microprocessor on the slave device will need to go to an interrupt routine, save its working registers, find out what address the master wants to read from, get the data and place it in its transmission register. This can take many uS to happen, meanwhile the master is blissfully sending out clock pulses on the SCL line that the slave cannot respond to. The I2C protocol provides a solution to this: the slave is allowed to hold the SCL line low! This is called clock stretching. When the slave gets the read command from the master it holds the clock line low. The microprocessor then gets the requested data, places it in the transmission register and releases the clock line allowing the pull-up resistor to finally pull it high. From the masters point of view, it will issue the first clock pulse of the read by making SCL high and then check to see if it really has gone high. If its still low then its the slave that holding it low and the master should wait until it goes high before continuing. Luckily the hardware I2C ports on most microprocessors will handle this automatically.

Sometimes however, the master I2C is just a collection of subroutines and there are a few implementations out there that completely ignore clock stretching. They work with things like EEPROM‘s but not with microprocessor slaves that use clock stretching. The result is that erroneous data is read from the slave. Beware!

Example Master Code
This example shows how to implement a software I2C master, including clock stretching. It is written in C for the PIC processor, but should be applicable to most processors with minor changes to the I/O pin definitions. It is suitable for controlling all of our I2C based robot modules. Since the SCL and SDA lines are open drain type, we use the tristate control register to control the output, keeping the output register low. The port pins still need to be read though, so they‘re defined as SCL_IN and SDA_IN. This definition and the initialization is probably all you‘ll need to change for a different processor.

#define SCL     TRISB4 // I2C bus
#define SDA     TRISB1 //
#define SCL_IN RB4    //
#define SDA_IN RB1    //

To initialize the ports set the output resisters to 0 and the tristate registers to 1 which disables the outputs and allows them to be pulled high by the resistors.
SDA = SCL = 1;
SCL_IN = SDA_IN = 0;

We use a small delay routine between SDA and SCL changes to give a clear sequence on the I2C bus. This is nothing more than a subroutine call and return.
void i2c_dly(void)
{
}

The following 4 functions provide the primitive start, stop, read and write sequences. All I2C transactions can be built up from these.
void i2c_start(void)
{
SDA = 1; // i2c start bit sequence
i2c_dly();
SCL = 1;
i2c_dly();
SDA = 0;
i2c_dly();
SCL = 0;
i2c_dly();
}

void i2c_stop(void)
{
SDA = 0; // i2c stop bit sequence
i2c_dly();
SCL = 1;
i2c_dly();
SDA = 1;
i2c_dly();
}

unsigned char i2c_rx(char ack)
{
char x, d=0;
SDA = 1;
for(x=0; x<8; x++) {
    d <<= 1;
    do {
      SCL = 1;
    }
while(SCL_IN==0);    // wait for any SCL clock stretching
    i2c_dly();
if(SDA_IN) d |= 1;
    SCL = 0;
}
if(ack) SDA = 0;
else SDA = 1;
SCL = 1;
i2c_dly();             // send (N)ACK bit
SCL = 0;
SDA = 1;
return d;
}

bit i2c_tx(unsigned char d)
{
char x;
static bit b;
for(x=8; x; x--) {
    if(d&0x80) SDA = 1;
    else SDA = 0;
    SCL = 1;
    d <<= 1;
    SCL = 0;
}
SDA = 1;
SCL = 1;
i2c_dly();
b = SDA_IN;          // possible ACK bit
SCL = 0;
return b;
}

The 4 primitive functions above can easily be put together to form complete I2C transactions. Here‘s and example to start an SRF08 ranging in cm:

i2c_start();              // send start sequence
i2c_tx(0xE0);             // SRF08 I2C address with R/W bit clear
i2c_tx(0x00);             // SRF08 command register address
i2c_tx(0x51);             // command to start ranging in cm
i2c_stop();               // send stop sequence

Now after waiting 65mS for the ranging to complete (I‘ve left that to you) the following example shows how to read the light sensor value from register 1 and the range result from registers 2 & 3.

i2c_start();              // send start sequence
i2c_tx(0xE0);             // SRF08 I2C address with R/W bit clear
i2c_tx(0x01);             // SRF08 light sensor register address
i2c_start();              // send a restart sequence
i2c_tx(0xE1);             // SRF08 I2C address with R/W bit set
lightsensor = i2c_rx(1); // get light sensor and send acknowledge. Internal register address will increment automatically.
rangehigh = i2c_rx(1);    // get the high byte of the range and send acknowledge.
rangelow = i2c_rx(0);     // get low byte of the range - note we don‘t acknowledge the last byte.
i2c_stop();               // send stop sequence

Easy isn‘t it?

The definitive specs on the I2C bus can be found on the Philips website. It currently here but if its moved you‘ll find it easily be googleing on "i2c bus specification".

基于I²C總線的處理器聯(lián)網(wǎng)設計

上網(wǎng)時間：2008年07月24日	收藏打印版推薦給同仁發(fā)送查詢

隨著微控制器的價格越來越低，功能越來越強大，電氣設計人員發(fā)現(xiàn)在單板和多板系統(tǒng)中都使用多個小型控制器是一種更加經(jīng)濟高效的方法。這種輔助處理器能夠減輕主處理器在耗時任務上面的處理開銷，例如掃描鍵盤、顯示控制器和電機控制。這些控制器也可以配置為各種各樣的專用外設。

最近，我接受了一項任務：開發(fā)一種能夠方便地適用于多種應用的接口(軟/硬件)，且要符合嵌入式處理器中常用的行業(yè)標準。在分析了一些典型應用之后，我們列出了一些針對該硬件接口的設計需求：常用于32位和8位處理器；能夠得到常用外設器件的支持；外設接口代碼量低于0.5kB；引腳數(shù)量少；數(shù)據(jù)帶寬可達10kBps；RAM用量少；一條總線上支持多種外設；方便使用API；不需要外部接口驅(qū)動硬件。

由于要求引腳數(shù)量少，所以必須采用串行接口。目前處理器中常見的串行接口包括SPI、I²C、USB和RS-232。通過從不同方面權(quán)衡比較這些接口，我最終選擇了I²C，因為它接口簡單，靈活性好，得到了大多數(shù)低成本控制器的支持。在不需要很高傳輸速度的情況下，較少的引腳數(shù)和流量控制功能還使得I²C接口相比SPI接口具有更大的優(yōu)勢。

I²C的工作原理

I²C是一種雙線雙向接口，包括一個時鐘信號和一個數(shù)據(jù)信號(SCL和SDA)。在不增加任何其他信號的情況下，一條I²C總線就可以支持多達12個設備。I²C接口規(guī)范包括三種工作速度：100kbps、400kbps和3.4Mbps。大多數(shù)常見的控制器只支持100-和400kbps兩種模式。I²C總線支持一個主設備多個從設備，或者多個主設備的配置結(jié)構(gòu)。

I²C一個非常重要的特性就是它支持流量控制。如果某個從設備無法保持連續(xù)的字節(jié)傳輸，它可以將總線掛起，直到能夠跟上主設備的傳輸速度。這對于包含最小規(guī)模的I²C硬件并且必須在固件上支持部分傳輸協(xié)議的從設備來說是非常有用的。I²C總線規(guī)范支持7b和10b兩種尋址協(xié)議。我發(fā)現(xiàn)7b尋址模式在大部分應用中的效率更高。

在開始編寫代碼之前，我們需要很好地了解I²C總線的工作原理。任何情況下I²C總線至少要包含一個主設備，至少要掛有一個或多個從設備。主設備總是由主到從發(fā)起數(shù)據(jù)傳輸操作。無論有多少個外設掛接在總線上，I²C接口只有兩個信號。

兩個信號都是集電極開路的，通過大小為2.7k左右的上拉電阻接Vcc電源。SDA信號是雙向的，可以由主設備或從設備驅(qū)動。SCL信號是由主設備驅(qū)動的，但是在一個數(shù)據(jù)字節(jié)的末尾從設備必須保持SCL信號為低，以延遲總線直到從設備開始處理數(shù)據(jù)。主設備在數(shù)據(jù)字節(jié)的最后一位傳輸完之后釋放SCL信號，然后檢查SCL信號是否變高。如果SCL沒有變高，那么主設備認為從設備正在請求主設備延遲，直到其開始處理數(shù)據(jù)。

當通過I²C總線發(fā)送數(shù)據(jù)時，只有當SCL為低電平時才能進行數(shù)據(jù)變換。當SCL信號為高時，任何方向的數(shù)據(jù)都應該是穩(wěn)定的(如圖1所示)。

當總線空閑時，主設備和從設備都不下拉SDA和SCL信號。在發(fā)起一次數(shù)據(jù)傳輸時，主設備驅(qū)動SDA信號從高電平變成低電平，同時SCL信號為高。一般地，當SCL信號為高電平時，SDA信號的狀態(tài)保持不變，但啟動或停止條件下除外。當SCL信號為高并且SDA信號從低變高時，是傳輸停止的情況(如圖2所示)。

I²C總線以8b為單位傳輸數(shù)據(jù)。每傳輸一個字節(jié)時，必須得到數(shù)據(jù)接收方的確認。所有的數(shù)據(jù)都是從MSB(最高有效位)開始傳輸?shù)摹?/p>

采樣率類似于動態(tài)影像的幀數(shù)，比如電影的采樣率是24赫茲，PAL制式的采樣率是25赫茲，NTSC制式的采樣率是30赫茲。當我們把采樣到的一個個靜止畫面再以采樣率同樣的速度回放時，看到的就是連續(xù)的畫面。同樣的道理，把以44.1kHZ采樣率記錄的CD以同樣的速率播放時，就能聽到連續(xù)的聲音。顯然，這個采樣率越高，聽到的聲音和看到的圖像就越連貫。當然，人的聽覺和視覺器官能分辨的采樣率是有限的，基本上高于44.1kHZ采樣的聲音，絕大部分人已經(jīng)覺察不到其中的分別了。
而聲音的位數(shù)就相當于畫面的顏色數(shù)，表示每個取樣的數(shù)據(jù)量，當然數(shù)據(jù)量越大，回放的聲音越準確，不至于把開水壺的叫聲和火車的鳴笛混淆。同樣的道理，對于畫面來說就是更清晰和準確，不至于把血和西紅柿醬混淆。不過受人的器官的機能限制，16位的聲音和24位的畫面基本已經(jīng)是普通人類的極限了，更高位數(shù)就只能靠儀器才能分辨出來了。比如電話就是3kHZ取樣的7位聲音，而CD是44.1kHZ取樣的16位聲音，所以CD就比電話更清楚。
當你理解了以上這兩個概念，比特率就很容易理解了。以電話為例，每秒3000次取樣，每個取樣是7比特，那么電話的比特率是21000。而CD是每秒44100次取樣，兩個聲道，每個取樣是16比特，所以CD的比特率是44100*2*16=1411200，也就是說CD每秒的數(shù)據(jù)量大約是172KB，而一張CD的容量是74分等于4440秒，就是763680KB＝745MB。
等等，一張CD的容量應該是640MB，那就是說前邊的44.1kHZ取樣率和16位精度這兩個數(shù)據(jù)中至少有一個不準確。第一個得745M是正確的，變成640M是因為cd音源寫入碟片采用了PCM預測編碼，編碼的目的就是壓縮，但是壓縮很小，失真就小，所以說cd格式幾乎是未壓縮的。

什么是數(shù)據(jù)采集?

簡介

在計算機廣泛應用的今天，數(shù)據(jù)采集的重要性是十分顯著的。它是計算機與外部物理世界連接的橋梁。各種類型信號采集的難易程度差別很大。實際采集時，噪聲也可能帶來一些麻煩。數(shù)據(jù)采集時，有一些基本原理要注意，還有更多的實際的問題要解決。

采樣頻率、抗混疊濾波器和樣本數(shù)

假設現(xiàn)在對一個模擬信號 x(t) 每隔Δ t 時間采樣一次。時間間隔Δ t 被稱為采樣間隔或者采樣周期。它的倒數(shù) 1/ Δ t 被稱為采樣頻率，單位是采樣數(shù) / 每秒。 t=0, Δ t ,2 Δ t ,3 Δ t …… 等等， x(t) 的數(shù)值就被稱為采樣值。所有 x(0),x( Δ t),x(2 Δ t ) 都是采樣值。這樣信號 x(t) 可以用一組分散的采樣值來表示：下圖顯示了一個模擬信號和它采樣后的采樣值。采樣間隔是Δ t ，注意，采樣點在時域上是分散的。

圖 1 模擬信號和采樣顯示

如果對信號 x(t) 采集 N 個采樣點，那么 x(t) 就可以用下面這個數(shù)列表示：

這個數(shù)列被稱為信號 x(t) 的數(shù)字化顯示或者采樣顯示。注意這個數(shù)列中僅僅用下標變量編制索引，而不含有任何關(guān)于采樣率（或Δ t ）的信息。所以如果只知道該信號的采樣值，并不能知道它的采樣率，缺少了時間尺度，也不可能知道信號 x(t) 的頻率。

根據(jù)采樣定理，最低采樣頻率必須是信號頻率的兩倍。反過來說，如果給定了采樣頻率，那么能夠正確顯示信號而不發(fā)生畸變的最大頻率叫做恩奎斯特頻率，它是采樣頻率的一半。如果信號中包含頻率高于奈奎斯特頻率的成分，信號將在直流和恩奎斯特頻率之間畸變。圖２顯示了一個信號分別用合適的采樣率和過低的采樣率進行采樣的結(jié)果。

采樣率過低的結(jié)果是還原的信號的頻率看上去與原始信號不同。這種信號畸變叫做混疊（ alias ）。出現(xiàn)的混頻偏差（ alias frequency ）是輸入信號的頻率和最靠近的采樣率整數(shù)倍的差的絕對值。

圖 2 不同采樣率的采樣結(jié)果

圖３給出了一個例子。假設采樣頻率 fs 是 100HZ, ，信號中含有 25 、 70 、 160 、和 510 Hz 的成分。

圖３說明混疊的例子

采樣的結(jié)果將會是低于奈奎斯特頻率（ fs/2=50 Hz ）的信號可以被正確采樣。而頻率高于 50HZ 的信號成分采樣時會發(fā)生畸變。分別產(chǎn)生了 30 、 40 和 10 Hz 的畸變頻率 F2 、 F3 和 F4 。計算混頻偏差的公式是：

混頻偏差＝ ABS （采樣頻率的最近整數(shù)倍－輸入頻率）

其中 ABS 表示“絕對值”，例如：

混頻偏差 F2 = |100 – 70| = 30 Hz

混頻偏差 F3 = |(2)100 – 160| = 40 Hz

混頻偏差 F4 = |(5)100 – 510| = 10 Hz

　　為了避免這種情況的發(fā)生，通常在信號被采集（ A/D ）之前，經(jīng)過一個低通濾波器，將信號中高于奈奎斯特頻率的信號成分濾去。在圖３的例子中，這個濾波器的截止頻率自然是 25HZ 。這個濾波器稱為 抗混疊濾波器

采樣頻率應當怎樣設置呢？也許你可能會首先考慮用采集卡支持的最大頻率。但是，較長時間使用很高的采樣率可能會導致沒有足夠的內(nèi)存或者硬盤存儲數(shù)據(jù)太慢。理論上設置采樣頻率為被采集信號最高頻率成分的２倍就夠了，實際上工程中選用５～１０倍，有時為了較好地還原波形，甚至更高一些。

通常，信號采集后都要去做適當?shù)男盘柼幚?，例?FFT 等。這里對樣本數(shù)又有一個要求，一般不能只提供一個信號周期的數(shù)據(jù)樣本，希望有５～１０個周期，甚至更多的樣本。并且希望所提供的樣本總數(shù)是整周期個數(shù)的。這里又發(fā)生一個困難，有時我們并不知道，或不確切知道被采信號的頻率，因此不但采樣率不一定是信號頻率的整倍數(shù)，也不能保證提供整周期數(shù)的樣本。我們所有的僅僅是一個時間序列的離散的函數(shù) x(n) 和采樣頻率。這是我們測量與分析的唯一依據(jù)。

數(shù)據(jù)采集系統(tǒng)的構(gòu)成

圖４　數(shù)據(jù)采集系統(tǒng)結(jié)構(gòu)

上圖表示了數(shù)據(jù)采集的結(jié)構(gòu)。在數(shù)據(jù)采集之前，程序?qū)Σ杉蹇ǔ跏蓟?，板卡上和?nèi)存中的 Buffer 是數(shù)據(jù)采集存儲的中間環(huán)節(jié)。需要注意的兩個問題是：是否使用 Buffer ？是否使用外觸發(fā)啟動、停止或同步一個操作。